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ONENAND CONTROLLER
CONTROLLER USAGE EXCEPTION
The OneNAND controller is designed with following exceptions:
1. The OneNAND Flash Memory Controller does not enforce any timing restrictions around the use of the
reset register.
2. The burst length value of OneNAND controller must be programmed with the same to or less than the
burst length value of the OneNAND flash device.
3. AMBA transactions must be of the same burst type throughout a page. During page transfers, the entire
page must be transferred to memory or to the AMBA bus before the dataram buffer is released for
another transaction.
4. Register accesses must use a transfer type of SINGLE.
5. Data access must use a transfer size of a WORD.
6. When OneNAND controller is used, especially '11' command, setting IOBE field is recommended.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
7-14
Specifications and information herein are subject to change without notice.
S3C6400X RISC MICROPROCESSOR
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