Samsung S3C6400X User Manual page 981

SPI CONTROLLER
Register
FB_Clk_sel (Ch0)
FB_Clk_sel (Ch1)
SWAP_CFG
SPICLKout delay
FB_Clk_sel
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
29-12
Specifications and information herein are subject to change without notice.
Address R/W
0x7F00B02C R/W Feedback clock selecting register.
0x7F00C02C R/W Feedback clock selecting register.
Bit
[2] R/W
R/W
[1:0]
S3C6400X RISC MICROPROCESSOR
Description
Description
0 : no additional delay
1 : 2.7ns delay (base on typical)
00 : 0nS additional delay
01 : 3nS additional delay
10 : 6nS additional delay
11 : 9nS additional delay
* Delay based on typical condition.
Reset Value
0x3
0x3
Initial State
1'b0
2'b3