Samsung S3C6400X User Manual page 914

HSMMC CONTROLLER
HOST CONTROL REGISTER
This register contains the SD Command Argument.
Register
HOSTCTL0 0x7C200028
HOSTCTL1 0x7C300028
HOSTCTL2 0x7C400028
Name Bit
Card Detect Signal Selection
CDSig [7]
This bit selects source for the card detection.
Sel
'1' = The Card Detect Test Level is selected (for test purpose)
'0' = SDCD# is selected (for normal use)
Card Detect Test Level
CDTe [6]
This bit is enabled while the Card Detect Signal Selection is set to 1 and it indicates
stLvl
card inserted or not.
'1' = Card Inserted
'0' = No Card
Extended Data Transfer Width (It is for MMC 8bit card.)
Wide8 [5]
'1' = 8 bit operation
'0' = the bit width is designated by the bit 1 (Data Transfer Width)
[4:3] Reserved
High Speed Enable
[2]
This bit is optional. Before setting this bit, the Host Driver shall check the High
Speed Support in the Capabilities register. If this bit is set to 0 (default), the Host
Controller outputs CMD line and DAT lines at the falling edge of the SD Clock (up
to 25MHz). If this bit is set to 1, the Host Controller outputs CMD line and DAT lines
at the rising edge of the SD Clock (up to 50MHz).
'1' = High Speed mode
'0' = Normal Speed mode
Data Transfer Width
[1]
This bit selects the data width of the Host Controller. The Host Driver shall set it to
match the data width of the SD card.
'1' = 4-bit mode
'0' = 1-bit mode
LED Control
[0]
This bit is used to caution the user not to remove the card while the SD card is
being accessed. If the software is going to issue multiple SD commands, this bit
can be set during all these transactions. It is not necessary to change for each
transaction.
'1' = LED on
'0' = LED off
Note : LED port is mapped to SD0_LED pin
Note: Card Detect Pin Level does not simply reflect SDCD# pin, but selects from SDCD, DAT[3], or CDTestlvl
depending on CDSSigSel and SDCDSel values.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-38
Specifications and information herein are subject to change without notice.
Address R/W
R/W
R/W
R/W
Description
Present State Register (Channel 0)
Present State Register (Channel 1)
Present State Register (Channel 2)
Description
S3C6400X RISC MICROPROCESSOR
Reset Value
0x0
0x0
0x0
Initial
Value
0
0
0
0
0
0
0