Samsung S3C6400X User Manual page 64

S3C6400X RISC MICROPROCESSOR
REGISTER DESCRIPTION
System controller controls PLL, clock generator, the power management part, and other system dependent part.
This section describe how to control these part using SFR(Special Functional Register) within the system
controller.
MEMORY MAP
The followings show 34 registers within system controller.
Register
APLL_LOCK
MPLL_LOCK
EPLL_LOCK
APLL_CON 0x7E00_F00C
MPLL_CON
EPLL_CON0
EPLL_CON1
CLK_SRC 0x7E00_F01C
CLK_DIV0
CLK_DIV1
CLK_DIV2
CLK_OUT 0x7E00_F02C
HCLK_GATE
PCLK_GATE
SCLK_GATE
0x7E00_F03C~
RESERVED
0x7E00_F0FC
AHB_CON0
AHB_CON1
AHB_CON2
RESERVED 0x7E00_F10C
SDMA_SEL
SW_RST
SYS_ID
RESERVED 0x7E00_F11C
MEM_SYS_CFG
QOS_OVERRIDE0
QOS_OVERRIDE1
Address R/W
0x7E00_F000 R/W
0x7E00_F004 R/W
0x7E00_F008 R/W
R/W
0x7E00_F010 R/W
0x7E00_F014 R/W
0x7E00_F018 R/W
R/W
0x7E00_F020 R/W
0x7E00_F024 R/W
0x7E00_F028 R/W
R/W
0x7E00_F030 R/W
0x7E00_F034 R/W
0x7E00_F038 R/W
-
0x7E00_F100 R/W
0x7E00_F104 R/W
0x7E00_F108 R/W
-
0x7E00_F110 R/W
0x7E00_F114 R/W
0x7E00_F118 R
-
0x7E00_F120 R/W
0x7E00_F124 R/W
0x7E00_F128 R/W
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Control PLL locking period for APLL
Control PLL locking period for MPLL
Control PLL locking period for EPLL
Control PLL output frequency for APLL
Control PLL output frequency for MPLL
Control PLL output frequency for EPLL
Control PLL output frequency for EPLL
Select clock source
Set clock divider ratio
Set clock divider ratio
Set clock divider ratio
Select clock output
Control HCLK clock gating
Control PCLK clock gating
Control SCLK clock gating
RESERVED
Configure AHB I/P/X/F bus
Configure AHB M1/M0/T1/T0 bus
Configure AHB R/S1/S0 bus
RESERVED
Select secure DMA input
Generate software reset
System ID for revision and pass
RESERVED
Configure memory subsystem
Override DMC0 QOS
Override DMC1 QOS
SYSTEM CONTROLLER
Reset Value
0x0000_FFFF
0x0000_FFFF
0x0000_FFFF
0x0190_0302
0x0214_0603
0x0020_0102
0x0000_9111
0x0000_0000
0x0105_1000
0x0000_0000
0x0000_0000
0x0000_0000
0xFFFF_FFFF
0xFFFF_FFFF
0xFFFF_FFFF
-
0x0400_0000
0x0000_0000
0x0000_0000
-
0x0000_0000
0x0000_0000
0x0000_0000
-
0x0000_0080
0x0000_0000
0x0000_0000
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