Samsung S3C6400X User Manual page 933

S3C6400X RISC MICROPROCESSOR
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Buffer Read Ready Signal Enable
'1' = Enabled
'0' = Masked
Buffer Write Ready Signal Enable
'1' = Enabled
'0' = Masked
DMA Interrupt Signal Enable
'1' = Enabled
'0' = Masked
Block Gap Event Signal Enable
'1' = Enabled
'0' = Masked
Transfer Complete Signal Enable
'1' = Enabled
'0' = Masked
Command Complete Signal Enable
'1' = Enabled
'0' = Masked
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
HSMMC CONTROLLER
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