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S3C6400X RISC MICROPROCESSOR
EXTERNAL INTERFACE
Camera Interface can support the next video standards. Two video standards are as follows:
— ITU-R BT 601 YCbCr 8-bit mode
— ITU-R BT 656 YCbCr 8-bit mode
SIGNAL DESCRIPTION
Name
XciPCLK
XciVSYNC
XciHREF
XciYDATA [7:0]
XciRSTn
XciCLK
1)
I/O direction. I: input, O: output, B: bi-direction
Note
I/O
External camera processor interface signal
I
Pixel Clock, driven by the Camera processor A
I
Frame Sync, driven by the Camera processor A
I
Horizontal Sync, driven by the Camera processor A
I
Pixel Data driven by the Camera processor A
O
Software Reset or Power Down for the Camera processor A
O
Clock for a external ISP
Table 20-2. Camera interface signal description
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
CAMERA INTERFACE
Description
20-3
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