Samsung S3C6400X User Manual page 105

S3C6400X RISC MICROPROCESSOR
EBI Interface
The EBI, as a peripheral, relies on the memory controllers to release their external requests for the external bus
when they are idle, because it has no other knowledge of when a transfer starts or completes.
Figure 4-3 shows an example of a simple handshake. In this example, a device requests the external bus and is
immediately granted because no other devices are requesting the bus.
If a higher priority device requests the bus when a lower priority device is in control of the external
EBIBACKOFF signals the lower priority device to release the bus as soon as possible. Figure 4-4 shows an
example of this.
In Figure 4-4., a higher priority device requests the bus, shortly after a device has been granted the bus. The
EBIBACKOFF signals the device to end the access early. Device 1 is granted the bus and completes its transfer.
When the transfer is complete, device 2 is granted the bus and completes the transfer that was interrupted. The
EBIREQ2 signal must be LOW for at least one clock
EBICLK
MEMCLK1
EBIREQ1
EBIGNT1
Figure 4-3. EBIREQ, EBIGANT signals
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
cycle, and it can be reasserted after this.
MEMORY SUBSYSTEM
bus, then the
4-7