Samsung S3C6400X User Manual page 871

USB2.0 HS OTG
INTknTXFEmp
OUTTknEPdis
TimeOUT
SetUp
AHBErr
EPDisbld
XferCompl
DEVICE ENDPOINT 0 TRANSFER SIZE REGISTER (DIEPTSIZ0)
The application must modify this register before enabling endpoint 0. Once endpoint 0 is enabled using Endpoint
Enable bit of the Device Control Endpoint 0 Control registers, the core modifies this register. The application can
only read this register once the core has cleared the Endpoint Enable bit.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
26-64
Specifications and information herein are subject to change without notice.
For OUT endpoints, this bit is reserved.
[4] R_SS_ IN Token Received When TxFIFO is Empty
WC Applies to non-periodic IN endpoints only.
Indicates that an IN token was received when the
associated TxFIFO was empty. This interrupt is
asserted on the endpoint for which the IN token was
received.
OUT Token Received When Endpoint Disabled
Applies only to control OUT endpoints.
Indicates that an OUT token was received when the
endpoint was not yet enabled. This interrupt is
asserted on the endpoint for which the OUT token
was received.
[3] R_SS_ Timeout Condition
WC Applies to non-isochronous IN endpoints only.
Indicates that the core has detected a timeout
condition on the USB for the last IN token on this
endpoint.
SETUP Phase Done
Applies to control OUT endpoints only.
Indicates that the SETUP phase for the control
endpoint is complete and no more back-to-back
SETUP packets were received for the current control
transfer. On this interrupt, the application can
decode the received SETUP data packet.
[2] R_SS_ AHB Error
WC Applies to IN and OUT endpoints.
This is generated only in Internal DMA mode when
there is an AHB error during an AHB read/write. The
application can read the corresponding endpoint
DMA address register to get the error address.
[1] R_SS_ Endpoint Disabled Interrupt
WC Applies to IN and OUT endpoints .
This bit indicates that the endpoint is disabled per
the application's request.
[0] R_SS_ Transfer Completed Interrupt
WC Applies to IN and OUT endpoints.
Indicates that the programmed transfer is complete
on the AHB as well as on the USB, for this endpoint.
S3C6400X RISC MICROPROCESSOR
1'b0
1'b0
1'b0
1'b0
1'b0