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NAND FLASH CONTROLLER
ECCType to '1'(enable MLC ECC). ECC module generates ECC parity code for 24-byte write data. So
you have to reset ECC value by writing the InitMECC (NFCONT[5]) bit as '1' and have to clear the
MainECCLock (NFCONT[7]) bit to '0'(Unlock) before write data.
MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.
5) Whenever data is written, the MLC ECC module generates ECC parity code internally.
6) When you finish writing 24-byte meta or extra data, the parity codes are automatically updated to
NFMECC0, NFMECC1 register. You can program these parity codes to spare area.
The parity codes have self-correctable information include parity code itself.
MLC ECC PROGRAMMING GUIDE (DECODING)
1) Spare area is consisted with four 7-byte parity fields for four 512-byte areas in main area, 24-byte meta
data, and 7-byte parity fields for this meta data.
2) To use MLC ECC in software mode, set the MsgLength to 0(512-byte message length) and set the
ECCType to '1'(enable MLC ECC). ECC module generates ECC parity code for 512-byte read data. So,
you have to reset ECC value by writing the InitMECC (NFCONT[5]) bit as '1' and have to clear the
MainECCLock (NFCONT[7]) bit to '0'(Unlock) before read data.
MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.
3) Whenever data is read, the MLC ECC module generates ECC parity code internally.
4) After you complete read 512-byte (does not include spare area data), you have to read parity codes. MLC
ECC module needs parity codes to detect whether error bits are or not. So you have to read ECC parity
code right after read 512-byte. Once ECC parity code is read, MLC ECC engine start to search any error
internally. MLC ECC error searching engine need minimum 155 cycles to find any error. During this time,
you can continue read main data from external NAND flash memory. ECCDecDone(NFSTAT[6]) can be
used to check whether ECC decoding is completed or not.
5) When ECCDecDone (NFSTAT[6]) is set ('1'), NFECCERR0 indicates whether error bit exist or not. If any
error exists, you can fix it by referencing NFECCERR0/1 and NFMLCBITPT register.
6) If you have more main data to read, continue to step 2.
7) For meta data error check, set the MsgLength to 1(24-byte message length) and set the ECCType to
'1'(enable MLC ECC). ECC module generates ECC parity code for 24-byte read data. So you have to
reset ECC value by writing the InitMECC (NFCONT[5]) bit as '1' and have to clear the MainECCLock
(NFCONT[7]) bit to '0'(Unlock) before read data.
MainECCLock (NFCONT[7]) bit controls whether ECC Parity code is generated or not.
8) Whenever data is read, the MLC ECC module generates ECC parity code internally.
9) After you complete read 24-byte, you have to read parity codes. MLC ECC module needs parity codes to
detect whether error bits are or not. So you have to read ECC parity codes right after read 24-byte. Once
ECC parity code is read, MLC ECC engine start to search any error internally. MLC ECC error searching
engine need minimum 155 cycles to find any error. During this time, you can continue read main data
from external NAND flash memory. ECCDecDone(NFSTAT[6]) can be used to check whether ECC
decoding is completed or not.
10) When ECCDecDone (NFSTAT[6]) is set ('1'), NFECCERR0 indicates whether error bit exist or not. If any
error exists, you can fix it by referencing NFECCERR0/1 and NFMLCBITPT register.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
8-10
Specifications and information herein are subject to change without notice.
S3C6400X RISC MICROPROCESSOR
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