Samsung S3C6400X User Manual page 122

DRAM CONTROLLER
USER_CONFIG REGISTER
Register
P0_user_cfg 0x7E000304
P1_user_cfg 0x7E001304
Pn_user_cfg
DQS[3] delay
DQS[2] delay
DQS[1] delay
DQS[0] delay
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
5-16
Specifications and information herein are subject to change without notice.
Address R/W
W
W
Bit
[31:8] Read undefined. Write as Zero
[7:6] Selects input dqs[3] delay.
[5:4] Selects input dqs[2] delay.
[3:2] Selects input dqs[1] delay.
Selects input dqs[0] delay.
[1:0]
Description
16-bit DRAM controller user_cfg register
32-bit DRAM controller user_cfg register
Description
S3C6400X RISC MICROPROCESSOR
Reset Value
Initial State
0x00
0x00
0
0
0
0