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S3C6400X RISC MICROPROCESSOR
CFG_BOOT_LOC
CFG_ADDR_EXPAN
D
CFG_ADV_FLASH
CFG_ADDR_CYCLE
CFG_BUS_WIDTH
CFG_PAGE_SIZE
1 = NAND flash boot is set.
Show with which area 0x00000000 address area is
aliased.
00 = Stepping Stone in NFCON.
[6:5]
01 = SROMC CS0
10 = OneNANDC CS0
11 = Internal ROM
Show whether Xm1DATA[31:16] pins are used for
SROMC address field or not.
0 = Xm1DATA[31:16] pins are used for DMC1 upper
[4]
halfword data field, data[31:16].
1 = Xm1DATA[31:16] pins are used for SROMC upper
10-bit address field, address[25:16].
Show whether initial setting of NAND flash is advanced
flash or not.
[3]
0 = Normal NAND flash.
1 = Advanced NAND flash.
[2]
Show address cycle initial setting of NAND flash.
Show SROMC CS0 memory bus width initial setting.
[1]
0 = 8-bit
1 = 16-bit
[0]
Show page size initial setting of NAND flash.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
SYSTEM CONTROLLER
XOM dependent
0
0
0
0
0
3-43
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