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FIMV-MFC V1.0
MULTI-FORMAT
CODEC
VIDEO
Video codec hardware
This section describes the video codec hardware of FIMV-MFC V1.0. All video codec processing except handling
coefficients for VLC and VLD are implemented with hardware.
Overview
H.264 encoder data flow
Figure 21.6 highlights the data flow of FIMV-MFC V1.0 H.264 encoding process. The inter-prediction module
loads only chrominance data of the reference frame in encoding. The luminance data are read from the local
memory of the motion estimation module so that additional bus-loading for the inter-prediction is removed. When
the deblocking filter operates in the on-the-fly mode, parts of reconstructed, but not filtered, pixel data are written
to external memory for later use in the intra-prediction module. When the deblocking filter operates in the stand-
alone mode, a whole reconstructed pixel data in a macroblock is written to external memory, and it is filtered if all
macroblocks are reconstructed.
Figure 21.6. H.264 encoder data flow
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
21-11
Specifications and information herein are subject to change without notice.
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