Samsung S3C6400X User Manual page 163

NAND FLASH CONTROLLER
BLOCK DIAGRAM
AHB
Slave I/F
BOOT LOADER FUNCTION
CORE ACCESS
(Boot Code)
USER ACCESS
Figure 8-2 NAND Flash Controller Boot Loader Block Diagram
During reset, the NAND flash controller will get information about connected NAND flash through Pin status of
XOM (refer to PIN CONFIGURATION). After power-on or system reset is occurred, the NAND Flash controller
loads automatically the 4-KB boot loader codes. After loading the boot loader codes, the boot loader code in
steppingstone is executed.
NOTE: During the auto boot, the ECC is not checked. Therefore, the first 4-KB of NAND flash must not have bit
error.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
8-2
Specifications and information herein are subject to change without notice.
SFR
Stepping Stone
Controller
Figure 8-1 NAND Flash Controller Block Diagram
REGISTERS
Stepping Stone
(4KB Buffer)
Special Function
Registers
ECC Gen.
NAND FLASH
Control &
State Machine
Stepping Stone
(4KB SRAM)
AUTO BOOT
NAND FLASH
Controller
S3C6400X RISC MICROPROCESSOR
nFCE
CLE
ALE
nRE
Interface
nWE
R/nB
I/O0 - I/O7
NAND FLASH
Memory