Samsung S3C6400X User Manual page 930

Table of Contents

Advertisement

HSMMC CONTROLLER
[5]
[4]
[3]
[2]
[1]
[0]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
27-54
Specifications and information herein are subject to change without notice.
'0' = Masked
Buffer Read Ready Status Enable
'1' = Enabled
'0' = Masked
Buffer Write Ready Status Enable
'1' = Enabled
'0' = Masked
DMA Interrupt Status Enable
'1' = Enabled
'0' = Masked
Block Gap Event Status Enable
'1' = Enabled
'0' = Masked
Transfer Complete Status Enable
'1' = Enabled
'0' = Masked
Command Complete Status Enable
'1' = Enabled
'0' = Masked
S3C6400X RISC MICROPROCESSOR
0
0
0
0
0
0

Advertisement

Table of Contents
loading

Table of Contents