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S3C6400X RISC MICROPROCESSOR
VIDOSD0C
-
OSDSIZE
Window 1 Position Control A Register
Register
VIDOSD1A
VIDOSD1A
OSD_LeftTopX_F
OSD_LeftTopY_F
Window 1 Position Control B Register
Register
VIDOSD1B
VIDOSD1B
OSD_RightBotX_F
OSD_RightBotY_F
Note. Registers must have word boundary X position.
So, 24 BPP mode must have X position by 1 pixel. ( ex, X = 0,1,2,3....)
16 BPP mode must have X position by 2 pixel. ( ex, X = 0,2,4,6....)
8 BPP mode must have X position by 4 pixel. ( ex, X = 0,4,8,12....)
Bit
[25:24]
Reserved
[23:0]
Window Size
Eq. Height * Width (Number of Word)
Note. Set filed value for YUV if (TV Encoder IF)
Address
R/W
0x77100050
R/W
Bit
[21:11]
Horizontal screen coordinate for left top pixel of OSD image
[10:0]
Vertical screen coordinate for left top pixel of OSD image
(for interlace TV output, this value MUST be set to half of the
original screen y coordinate. And the original screen y coordinate
MUST be even value.)
Address
R/W
0x77100054
R/W
Bit
[21:11]
Horizontal screen coordinate for right bottom pixel of OSD image
[10:0]
Vertical screen coordinate for right bottom pixel of OSD image
(for interlace TV output, this value MUST be set to half of the
original screen y coordinate. And the original screen y coordinate
MUST be odd value.)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Video Window 1's position control 2 register
Description
Description
Video Window 1's position control register
Description
DISPLAY CONTROLLER
initial
state
0
0
Reset
Value
0x0
initial
state
0
0
Reset
Value
0x0
initial
state
0
0
14-49
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