Samsung S3C6400X User Manual page 636

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S3C6400X RISC MICROPROCESSOR
(d) VC-1 decoding for bitstream B : RunIndex = 3
-
Assigning coding format - RunCodStd
In addition to the process ID, the
and whether the created process encodes image or decodes bitstream.
RunCodStd = 0: MPEG-4/H.263P3 decoding
-
RunCodStd = 1: MPEG-4/H.263P3 encoding
-
RunCodStd = 2: H.264 decoding
-
RunCodStd = 3: H.264 encoding
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RunCodStd = 4: VC-1 decoding
-
For example, if processes are created such as the 5.4.1.1, the RunIndex and the RunCodStd for each process is
listed below:
(a) MPEG-4 encoding process: RunIndex = 0, RunCodStd = 0
-
(b) H.264 encoding process: RunIndex = 1, RunCodStd = 3
-
(c) H.263P3 decoding process: RunIndex = 2, RunCodStd = 1
-
(d) VC-1 decoding process: RunIndex = 3, RunCodStd = 4
-
Codec status
FIMV-MFC V1.0 provides the BusyFlag registers and interrupts that give you information about whether a
requested process finished encoding or decoding 1 frame as specified format. When the IP is under operation, the
BusyFlag is read as '1'. If encoding or decoding 1 frame is finished and the IP is in the wait state that can accept a
command from a host processor, the BusyFlag becomes '0'. At the time the BusyFlag becomes '1', the interrupt
from the IP occurs. A host processor must clear the interrupt before requesting the next process.
If there are some errors in processing a frame, both the BusyFlag and the interrupt are also asserted. A host
processor can know whether a process is terminated normally or not by referring to other status registers of the
host interface.
Interrupt
To a host processor
The BIT processor can generate an interrupt request to a host processor. Basically, this interrupt is used to
indicate completion of encoding or decoding a frame. The interrupt signal, IREQ, is active HIGH and is retained till
the host processor clears it by writing '1' to interrupt clear register of the host interface.
The IREQ is synchronized to the CCLK.
From a host processor
A host processor can request an interrupt to the IP by writing the '1' to the HostIntReq register of the host
interface. The interrupt is automatically cleared after acknowledgement of the BIT processor.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
21-10
Specifications and information herein are subject to change without notice.
is used to define which coding standard is used in created process
RunCodStd
MULTI-FORMAT VIDEO CODEC

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