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S3C6400 RISC MICROPROCESSOR
EINT0MASK
EINT27
EINT26
EINT25
EINT24
EINT23
EINT22
EINT21
EINT20
EINT19
EINT18
EINT17
EINT16
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
EINT7
EINT6
EINT5
EINT4
EINT3
EINT2
EINT1
EINT0
Bit
[27]
0 = Enable Interrupt
[26]
0 = Enable Interrupt
[25]
0 = Enable Interrupt
[24]
0 = Enable Interrupt
[23]
0 = Enable Interrupt
[22]
0 = Enable Interrupt
[21]
0 = Enable Interrupt
[20]
0 = Enable Interrupt
[19]
0 = Enable Interrupt
[18]
0 = Enable Interrupt
[17]
0 = Enable Interrupt
[16]
0 = Enable Interrupt
[15]
0 = Enable Interrupt
[14]
0 = Enable Interrupt
[13]
0 = Enable Interrupt
[12]
0 = Enable Interrupt
[11]
0 = Enable Interrupt
[10]
0 = Enable Interrupt
[9]
0 = Enable Interrupt
[8]
0 = Enable Interrupt
[7]
0 = Enable Interrupt
[6]
0 = Enable Interrupt
[5]
0 = Enable Interrupt
[4]
0 = Enable Interrupt
[3]
0 = Enable Interrupt
[2]
0 = Enable Interrupt
[1]
0 = Enable Interrupt
[0]
0 = Enable Interrupt
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
1= Masked
GPIO
Initial State
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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