Samsung S3C6400X User Manual page 921

S3C6400X RISC MICROPROCESSOR
TIMEOUT CONTROL REGISTER
At the initialization of the Host Controller, the Host Driver can set the Data Timeout Counter Value according to
the Capabilities register.
Register
CMDREG0 0x7C20002E
CMDREG1 0x7C30002E
CMDREG2 0x7C40002E
Name Bit
Reserved
[7:4]
Data Timeout Counter Value
[3:0]
This value determines the interval by which DAT line timeouts are detected.
Refer to the Data Timeout Error in the Error Interrupt Status register for
information on factors that dictate timeout generation. Timeout clock frequency
will be generated by dividing the base clock TMCLK value by this value. When
setting this register, prevent inadvertent timeout events by clearing the Data
Timeout Error Status Enable (in the Error Interrupt tatus Enable register)
1111b Reserved
1110b TMCLK x 2
1101b TMCLK x 2
.............. ...
0001b TMCLK x 2
0000b TMCLK x 2
SOFTWARE RESET REGISTER
A reset pulse is generated when writing 1 to each bit of this register. After completing the reset, the Host
Controller clears each bit. Because it takes some time to complete software reset, the SD Host Driver shall
confirm that these bits are 0.
Register
SWRST0 0x7C20002F
SWRST1 0x7C30002F
SWRST2 0x7C40002F
Name Bit
[7:3]
Reserved
Software Reset For DAT Line
[2]
Only part of data circuit is reset. DMA circuit is also reset. (RWAC)
The following registers and bits are cleared by this bit:
Buffer Data Port register
Present State register
Address R/W
R/W
R/W
R/W
27
26
14
13
Address R/W
R/W
R/W
R/W
Buffer is cleared and initialized.
Buffer Read Enable
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Timeout Control Register (Channel 0)
Timeout Control Register (Channel 1)
Timeout Control Register (Channel 2)
Description
Description
Software Reset Register (Channel 0)
Software Reset Register (Channel 1)
Software Reset Register (Channel 2)
Description
HSMMC CONTROLLER
Reset Value
0x0
0x0
0x0
Initial
Value
0
0
Reset Value
0x0
0x0
0x0
Initial
Value
0
0
27-45