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S3C6400X RISC MICROPROCESSOR
Secure DMA control register
REGISTER
SDMA_SEL
SDMA_SEL
SECURITY_TX
SECURITY_RX
RESERVED
EXTERNAL
IRDA
PWM
AC_MICIN
AC_PCMIN
AC_PCMOUT
SPI1_RX
SPI1_TX
I2S1_RX
I2S1_TX
PCM1_RX
PCM1_TX
HSI_RX
HSI_TX
SPI0_RX
SPI0_TX
I2S0_RX
I2S0_TX
PCM0_RX
PCM0_TX
UART3[1]
UART3[0]
UART2[1]
UART2[0]
UART1[1]
UART1[0]
UART0[1]
UART0[0]
ADDRESS
R/W
0x7E00_F110
R/W
BIT
DMA selection for security Tx (always selects SDMA1
[31]
regardless of SECURITY_TX field)
DMA selection for security Rx (always selects SDMA1
[30]
regardless of SECURITY_TX field)
[29:28] RESERVED
[27]
DMA selection for external (0: SDMA1, 1: DMA1)
[26]
DMA selection for IrDA (0: SDMA1, 1: DMA1)
[25]
DMA selection for IrDA (0: SDMA1, 1: DMA1)
[24]
DMA selection for IrDA (0: SDMA1, 1: DMA1)
[23]
DMA selection for PCM input (0: SDMA1, 1: DMA1)
[22]
DMA selection for PCM output (0: SDMA1, 1: DMA1)
[21]
DMA selection for SPI1 Rx (0: SDMA1, 1: DMA1)
[20]
DMA selection for SPI1 Tx (0: SDMA1, 1: DMA1)
[19]
DMA selection for I2S1 Rx (0: SDMA1, 1: DMA1)
[18]
DMA selection for I2S1 Tx (0: SDMA1, 1: DMA1)
[17]
DMA selection for PCM1 Rx (0: SDMA1, 1: DMA1)
[16]
DMA selection for PCM1 Tx (0: SDMA1, 1: DMA1)
[15]
DMA selection for HSI Rx (0: SDMA0, 1: DMA0)
[14]
DMA selection for HSI Tx (0: SDMA0, 1: DMA0)
[13]
DMA selection for SPI0 Rx (0: SDMA0, 1: DMA0)
[12]
DMA selection for SPI0 Tx (0: SDMA0, 1: DMA0)
[11]
DMA selection for I2S0 Rx (0: SDMA0, 1: DMA0)
[10]
DMA selection for I2S0 Tx (0: SDMA0, 1: DMA0)
[9]
DMA selection for PCM0 Rx (0: SDMA0, 1: DMA0)
[8]
DMA selection for PCM0 Tx (0: SDMA0, 1: DMA0)
[7]
DMA selection for UART3 (0: SDMA0, 1: DMA0)
[6]
DMA selection for UART3 (0: SDMA0, 1: DMA0)
[5]
DMA selection for UART2 (0: SDMA0, 1: DMA0)
[4]
DMA selection for UART2 (0: SDMA0, 1: DMA0)
[3]
DMA selection for UART1 (0: SDMA0, 1: DMA0)
[2]
DMA selection for UART1 (0: SDMA0, 1: DMA0)
[1]
DMA selection for UART0 (0: SDMA0, 1: DMA0)
[0]
DMA selection for UART0 (0: SDMA0, 1: DMA0)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DESCRIPTION
Secure DMA input selection
DESCRIPTION
SYSTEM CONTROLLER
RESET VALUE
0x0000_0000
RESET VALUE
0
0
0x0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3-37
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