Samsung S3C6400X User Manual page 826

Table of Contents

Advertisement

S3C6400X RISC MICROPROCESSOR
HstSetHNPEn
HNPReq
HstNegScs
SesReq
SesReqScs
OTG INTERRUPT REGISTER (GOTGINT)
The application reads this register whenever there is an OTG interrupt and clears the bits in this register to clear
the OTG interrupt.
Register
Address
GOTGINT
0x7C00_0004
GOTGINT
[31:20]
· 1'b1 : HNP is enabled in the application
[10]
R_W
Host Set HNP Enable
The application sets this bit when it has successfully
enabled HNP on the connected device.
· 1'b0 : Host Set HNP is not enabled
· 1'b1 : Host Set HNP is enabled
[9]
R_W
HNP Request
The application sets this bit to initiate an HNP
request to the connected USB host. The core clears
this bit when the HstNegSucStsChng bit is cleared.
· 1'b0 : No HNP request
· 1'b1 : HNP request
[8]
RO
Host Negotiation Success
The core sets this bit when host negotiation is
successful. The core clears this bit when the HNP
Request (HNPReq) bit in this register is set.
· 1'b0 : Host negotiation failure
· 1'b1 : Host negotiation success
[7:2]
Reserved
[1]
R_W
Session Request
The application sets this bit to initiate a session
request on the USB. The core clears this bit when
the HstNegSucStsChng bit is cleared.
· 1'b0 : No session request
· 1'b1 : Session request
[0]
RO
Session Request Success
The core sets this bit when a session request
initiation is successful.
· 1'b0 : Session request failure
· 1'b1 : Session request success
R/W
R/W
Bit
R/W
Reserved
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
OTG Interrupt Register
Description
USB2.0 HS OTG
1'b0
1'b0
1'b0
6'h0
1'b0
1'b0
Reset Value
32 bits
Initial State
12'h0
26-19

Advertisement

Table of Contents
loading

Table of Contents