Samsung S3C6400X User Manual page 184

S3C6400X RISC MICROPROCESSOR
ECC0/1 ERROR STATUS REGISTER
Register Address
NFECCERR0 0x7020002C
NFECCERR1 0x70200030
When ECCType is SLC.
NFECCERR0 Bit
Reserved [31:25]
SErrorDataNo [24:21]
SErrorBitNo [20:18]
MErrorDataNo [17:7]
MErrorBitNo [6:4]
SpareError [3:2]
MainError [1:0]
NFECCERR1
Reserved
The above value
Note: s
R/W
R NAND Flash ECC Error Status register for I/O [7:0]
R NAND Flash ECC Error Status register for I/O [7:0]
Reserved
In spare area, Indicates which number data is error
In spare area, Indicates which bit is error
In main data area, Indicates which number data is error
In main data area, Indicates which bit is error
Indicates whether spare area bit fail error occurred
00: No Error
10: Multiple error
Indicates whether main data area bit fail error occurred
00: No Error
10: Multiple error
Bit
[31:0] Reserved
are both
only valid when ECC register
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
01: 1-bit error(correctable)
11: ECC area error
01: 1-bit error(correctable)
11: ECC area error
Description
and
ECC status register have valid value.
NAND FLASH CONTROLLER
Reset Value
0x007FFFFA
0x007FFFFA
Initial State
0x00
0011
111
0x7FF
111
10
10
Initial State
0x00
8-23