Samsung S3C6400X User Manual page 844

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S3C6400X RISC MICROPROCESSOR
FSLSPclkSel
HOST FRAME NUMBER/FRAME TIME REMAINING REGISTER (HFNUM)
This register indicates the current frame number. It also indicates the time remaining in the current frame.
Register
Address
HFNUM
0x7C00_0408
HFNUM
FrRem
[31:16]
FrNum
HOST PERIODIC TRANSMIT FIFO/QUEUE STATUS REGISTER (HPTXSTS)
This read-only register contains the free space information for the Periodic TxFIFO and the Periodic Transmit
Request Queue.
make changes to this field after initial programming.
· 1'b0 : HS/FS/LS, based on the maximum speed
supported by the connected device
· 1'b1 : FS/LS -only, even if the connected device
can support HS
[1:0]
R_W
FS/LS PHY Clock Select
When the core is in FS Host mode
· 2'b00 : PHY clock is 30/60 Mhz
· 2'b01 : PHY clock is 48 Mhz
· Others : Reserved
When the core is in LS Host mode
· 2'b00 : PHY clock is 30/60 Mhz
· 2'b01 : PHY clock is 48 Mhz
· 2'b10 : PHY clock is 6 Mhz
· 2'b11 : Reserved
R/W
R
Host Frame Number/Frame Time Remaining
Bit
R/W
RO
Frame Time Remaining
Indicates the amount of time remaining in the current
microframe(HS) or frame(FS/LS), in terms of PHY
clocks. This field decrements on each PHY clock.
When it reaches zero, this field is reloaded with the
value in the Frame Interval register and a new SOF
is transmitted on the USB.
[15:0]
RO
Frame Number
This field increment when a new SOF is transmitted
on the USB, and is reset to 0 when it reaches
16'h3FFF.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Register
Description
USB2.0 HS OTG
2'b0
Reset Value
32 bits
Initial State
16'h0
16'h3FFF
26-37

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