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S3C6400X RISC MICROPROCESSOR
AHB_CON1 controls AHB-T0, AHB-T1, AHB-M0, AHB-M1 bus systems.
AHB_CON1
DISABLE_HLOCK_M
RESERVED
PRIOR_TYPE_M1
RESERVED
FIX_PRIOR_M1
RESERVED
PRIOR_TYPE_M0
RESERVED
FIX_PRIOR_M0
DISABLE_HLOCK_T
RESERVED
PRIOR_TYPE_T1
RESERVED
FIX_PRIOR_T1
RESERVED
PRIOR_TYPE_T0
RESERVED
FIX_PRIOR_T0
The arbitration numbers of the above bus system are as follows:
Arbitration Number
0
1
2
3
4
5
6
7
BIT
[31]
Control HLOCK for M-block (0: disable, 1:enable)
[30]
RESERVED
[29:28] Arbitration type for AHB-M1
[27]
RESERVED
[26:24] Fixed priority order for AHB-M1
[23:22] RESERVED
[21:20] Arbitration type for AHB-M0
[19]
RESERVED
[18:16] Fixed priority order for AHB-M0
[15]
Control HLOCK for T-block (0: disable, 1:enable)
[14]
RESERVED
[13:12] Arbitration type for AHB-T1
[11]
RESERVED
[10:8]
Fixed priority order for AHB-T1
[7:6]
RESERVED
[5:4]
Arbitration type for AHB-T0
[3]
RESERVED
[2:0]
Fixed priority order for AHB-T0
AHB-T0
HOST I/F
USB Host
MDP I/F
-
-
-
-
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DESCRIPTION
AHB-T1
AHB-M0
HOST I/F
-
-
-
-
-
-
Default bus master
SYSTEM CONTROLLER
RESET VALUE
AHB-M1
DMA0
DMA0
DMA1
DMA1
-
-
-
-
-
0
0
0
0
0x0
0x0
0
0
0x0
0
0
0
0
0x0
0x0
0
0
0x0
-
-
-
-
-
3-35
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