Samsung S3C6400X User Manual page 867

USB2.0 HS OTG
EPDis
SetD1PID
SetOddFr
SetD0PID
SetEvenFr
SNAK
CNAK
TxFNum [25:22]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
26-60
Specifications and information herein are subject to change without notice.
the following interrupts on this endpoint :
· SETUP Phase Done (OUT only)
· Endpoint Disabled
· Transfer Complete Transfer Completed
Note : For control OUT endpoints in DMA mode, this
bit must be set to be able to transfer SETUP data
packets in memory.
[30] R_WS_ Endpoint Disable
SC Applies to IN and OUT endpoints.
The application sets this bit to stop
transmitting/receiving data on an endpoint, even
before the transfer for that endpoint is complete. The
application must wait for the Endpoint Disabled
interrupt before treating the endpoint as disabled.
The core clears this bit before setting the Endpoint
Disabled Interrupt. The application must set this bit
only if Endpoint Enable is already set for this
endpoint.
[29] WO Set DATA1 PID
Applies to interrupt/bulk IN and OUT endpoints only.
Writing to this field sets the Endpoint Data PID
(DPID) field in this register to DATA1.
Set Odd (micro)frame
Applies to isochronous IN and OUT endpoints only.
Writing to this field sets the Even/Odd (micro)frame
field to odd (micro)frame.
Set DATA0 PID
[28] WO
Applies to interrupt/bulk IN and OUT endpoints only.
Writing to this field sets the Endpoint Data PID
(DPID) field in this register to DATA0.
Set Even (micro)frame
Applies to isochronous IN and OUT endpoints only.
Writing to this field sets the Even/Odd (micro)frame
field to even (micro)frame.
[27] WO Set NAK
Applies to IN and OUT endpoints.
A write to this bit sets the NAK bit for the endpoint.
Using this bit, the application can control the
transmission of NAK handshakes on an endpoint.
The core can also set this bit for OUT endpoints on a
Transfer Completed interrupt, or after a SETUP
packet is received on that endpoint.
[26] WO Clear NAK
Applies to IN and OUT endpoints. A write to this bit
clears the NAK bit for the endpoint.
R_W TxFIFO Number
Applies to IN endpoints only.
Non-periodic endpoints must set this bit to zero.
S3C6400X RISC MICROPROCESSOR
1'b0
1'b0
1'b0
1'b0
1'b0
4'h0