Samsung S3C6400X User Manual page 674

MULTI-FORMAT VIDEO CODEC
S3C6400X RISC MICROPROCESSOR
Decoder operation
The BIT processor writes decoded coefficient without reordering-inverse zig-zag scanning. The reordering
process is performed when the inverse quantization module reads coefficients from the coefficient buffer interface.
The sub-modules such as the quantizer and AC/DC predictor handles zero if corresponding flag of coefficient is
zero.
Figure 21.39 MPEG-4 decoding case
Figure 21.39 H.264 decoding case
Note:
In the figure 21.36, figure 21.37, figure 21.38, and figure 21.39, MC+ means reconstruction, and MC- computing
residual.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
21-48
Specifications and information herein are subject to change without notice.