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S3C6400X RISC MICROPROCESSOR
ERROR PAGE ADDRESS REGISTER
Register
ERR_PAGE_ADDR0
ERR_PAGE_ADDR1
ERR_PAGE_ADDRn
Reserved
FAIL_PAGE_ADDR
BURST READ LATENCY REGISTER
Register
BURST_RD_LAT0
BURST_RD_LAT1
BURST_RD_LATn
Reserved
BURST_RD_LAT
INTERRUPT PIN ENABLE REGISTER
Register
INT_PIN_ENABLE0
INT_PIN_ENABLE1
INT_PIN_ENABLEn
Reserved
INT
Address
R/W
0x70100180
R
Bank0 Error Page Address Register
0x70180180
Bit
[31:6]
[5:0]
After a program, load or erase error interrupt, this register will
hold the page address of the failing operation. Read-Only.
Address
R/W
0x70100190
R
Bank0 Burst Read Latency Register
0x70180190
Bit
[31:3]
[2:0]
Sets the burst read latency in cycles. The default value is 0x6.
This value is copied from the MEM_CFG register[14:12].
Read-Only.
Address
R/W
0x701001A0
R/W Bank0 Interrupt Pin Enable Register
0x701801A0
Bit
[31:1]
[0]
Interrupt Pin Enable. Enables if the optional interrupt pin is
being used or if the controller must scan the status register for
interrupt information. Set by software during initialization.
• 0 = Use the status register.
• 1 = Use the interrupt pin.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
Description
Description
Description
ONENAND CONTROLLER
Reset Value
0x0000
Initial State
0
0
Reset Value
0x0006
Initial State
0
6
Reset Value
0x0000
Initial State
0
0
7-29
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