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Pulse Width Modulation Timer
TOUT0
nTOUT0
DEADZONE
INTERVAL
TOUT0_DZ
nTOUT0_DZ
Figure 32-10: The waveform when a deadzone feature is enabled.
DMA REQUEST MODE
Instead of sending an Interrupt at the end of the down-counter cycle, a Timer can be configured to send a DMA
request signal to one of the DMA channels. This mode is intended to allow DMA transfers between a source and
destination to occur at regular intervals. The idea is not to have the Timer as the source or destination, but rather
to have the timer simply control the timing of data movement between two other devices.
The timer will keep the DMA request signal (DMA_REQ) active (high) until the timer receives the ACK signal
from the DMA unit. When the timer receives the ACK signal, it makes the request signal inactive.
Only one Timer at a time can be configured as the DMA request source. The timer that generates the DMA
request is determined by setting DMA mode bits (in TCFG1 register). If a particular timer is configured as DMA
request mode, that timer sends the DMA request and generate the normal ARM interrupt request. However the
other Timers, which are not
Timers are configured in DMA mode, then all of them can generate normal interrupts.
The Figure 32-11 shows how the DMA request will remain active until the DMA sends the ACK signal.
32-12
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
configured
for DMA mode, can still generate ARM interrupts normally. If none of the
S3C6400 RISC MICROPROCESSOR
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