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S3C6400X RISC MICROPROCESSOR
PC CARD CONTROLLER BLOCK DIAGRAM
A top-level block diagram of the PC card controller is shown below in Figure 9-2.
ADDR
nWE
,
nOE
nIOWR
,
nIORD
nREG
WDATA
16
RDATA
16
nCE1,nCE2
nCD
Write_dir
nWAIT
PC card controller Block
11
Main
Controller
Data
Buffer
&
Controller
Top
Controller
Figure 9-2: PC Card Controller Top Block Diagram
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Special
Address
Address
Function
decoder
&
Register
Command
buffer
32
32
32
CF CONTROLLER
AHB ADDR
&
AHB Control signal
HRDATA
32
HWDATA
9-7
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