Samsung S3C6400X User Manual page 292

S3C6400 RISC MICROPROCESSOR
EINT12PEND
Reserved [31:24]
[16+m]
EINT2[m]
m = 0 ~ 7
Reserved
EINT1[n]
n = 0 ~ 14
EINT34PEND
Reserved [31:30]
[16+m]
EINT4[m]
m = 0 ~ 13
Reserved
EINT3[n]
n = 0 ~ 4
EINT56PEND
Reserved [31:26]
[16+m]
EINT6[m]
m = 0 ~ 9
Reserved
EINT5[n]
n = 0 ~ 6
EINT78PEND
[16+m]
EINT8[m]
m = 0 ~ 14
EINT7[n]
n = 0 ~ 15
EINT9PEND
Reserved
EINT9[n]
n = 0 ~ 8
Bit
Reserved
0 = Not occur
[15] Reserved
[n]
0 = Not occur
Bit
Reserved
0 = Not occur
[15:5] Reserved
[n]
0 = Not occur
Bit
Reserved
0 = Not occur
[15:7] Reserved
[n]
0 = Not occur
Bit
0 = Not occur
[n]
0 = Not occur
Bit
[31:9] Reserved
[n]
0 = Not occur
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
1= Occur interrupt
1= Occur interrupt
Description
1= Occur interrupt
1= Occur interrupt
Description
1= Occur interrupt
1= Occur interrupt
Description
1= Occur interrupt
1= Occur interrupt
Description
1= Occur interrupt
GPIO
Initial State
0
0
0
0
Initial State
0
0
0
0
Initial State
0
0
0
0
Initial State
0
0
Initial State
0
0
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