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S3C6400X RISC MICROPROCESSOR
reserved
RxDMA On
TxDMA On
DMA transfer
** Channel Transfer size should be smaller than Bus Transfer size or the same as.
Register
Slave_slection_reg(Ch0)
Slave_slection_reg(Ch1)
Slave_slection_reg
nCS_time_count
reserved
Auto_n_Manual
nSSout
Register
SPI_INT_EN(Ch0)
SPI_INT_EN(Ch1)
SPI_INT_EN
IntEnTrailing
IntEnRxOverrun
IntEnRxUnderrun
-
[4:3]
R/W
[2]
DMA mode on/off
0 : DMA mode off
R/W
[1]
DMA mode on/off
0 : DMA mode off
R/W
[0]
DMA transfer type, single or 4 bust.
0 : single
DMA transfer size must be set as the same
size in DMA as it is in SPI.
Address
R/W
0x7F00B00C
R/W
0x7F00C00C
R/W
Bit
nSSout inactive time =
R/W
[9:4]
((nCS_time_count+3)/2) x SPICLKout)
-
[3:2]
Chip select toggle manual or auto selection
R/W
[1]
R/W
[0]
Address
R/W
0x7F00B010
R/W SPI Interrupt Enable register
0x7F00C010
R/W SPI Interrupt Enable register
Bit
Interrupt Enable for trailing count to be zero
[6]
R/W
0: Disable
R/W
[5]
0: Disable
R/W
[4]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
-
1 : DMA mode on
1 : DMA mode on
Description
Slave selection signal
Slave selection signal
Description
reserved -
0: manual
Slave selection signal( manual only)
0: active
Description
Description
Interrupt Enable for RxOverrun
Interrupt Enable for RxUnderrun
SPI CONTROLLER
1 : 4 burst
Reset Value
Initial State
1: Auto
1: inactive
Reset Value
Initial State
1:Enable
1:Enable
-
1'b0
1'b0
1'b0
0x1
0x1
6'b0
-
1'b0
1'b1
0x0
0x0
1'b0
1'b0
1'b0
29-7
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