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JPEG CODEC
HUFADDR0
Huff_addr0
HUFADDR1
Register
HUFADDR1
HUFADDR1
Huff_addr1
HUFADDR0 and HUFADDR1 are the start address for JPEG data. Both encode mode and decode mode, JPEG
data are stored or read from this address.
If process (encoding or decoding) is ended, HUFADDR0 or HUFADDR1 are swapped.
SW_JSTART
Register
SW_JSTART
SW_JSTART
Reserved
S_JSTART
SW_JRSTART
Register
SW_JRSTART
SW_JRSTART
Reserved
S_JRSTART
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
22-22
Specifications and information herein are subject to change without notice.
Bit
R/W
[31:0]
R/W
Source or destination JPEG file address 0
Address
0x7880100C
Source or destination JPEG file address 1
Bit
R/W
[31:0]
R/W
Source or destination JPEG file address 1
Address
0x78801010
Bit
R/W
[31:1]
-
Reserved
[0]
R/W
0: Don't start JPEG process.
Address
0x78801014
Bit
R/W
[31:1]
-
Reserved
[0]
R/W
This value is available in decoding process.
Description
Description
Description
Description
Start JPEG process
Description
1: Start JPEG process
Description
Restart JPEG process
Description
S3C6400X RISC MICROPROCESSOR
Reset Value
0x0000_0000
Reset Value
0x0000_0000
Reset Value
0x0000_0000
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