Samsung S3C6400X User Manual page 586

S3C6400X RISC MICROPROCESSOR
CODEC OUTPUT Y1 START ADDRESS REGISTER
Register Address
CICOYSA1 0x78000018
CICOYSA1
CICOYSA1 [31:0]
CODEC OUTPUT Y2 START ADDRESS REGISTER
Register Address
CICOYSA2 0x7800001C
CICOYSA2
CICOYSA2 [31:0]
CODEC OUTPUT Y3 START ADDRESS REGISTER
Register Address
CICOYSA3 0x78000020
CICOYSA3
CICOYSA3 [31:0]
CODEC OUTPUT Y4 START ADDRESS REGISTER
Register Address
CICOYSA4 0x78000024
CICOYSA4
CICOYSA4 [31:0]
R/W
RW
Bit
Non-Interleave Y, Interleave YCbCr, RGB : 1
R/W
RW
Bit
Non-Interleave Y, Interleave YCbCr, RGB : 2
R/W
RW
Bit
Non-Interleave Y, Interleave YCbCr, RGB : 3
R/W
RW
Bit
Non-Interleave Y, Interleave YCbCr, RGB : 4
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
st
1 frame start address for codec DMA
Description
Description
nd
2 frame start address for codec DMA
Description
Description
rd
3 frame start address for codec DMA
Description
Description
th
4 frame start address for codec DMA
Description
CAMERA INTERFACE
Reset Value
st
frame start address
Reset Value
nd
frame start address
Reset Value
rd
frame start address
Reset Value
th
frame start address
0
Initial
M L
State
0
O X
0
Initial
M L
State
0
O X
0
Initial
M L
State
0
O X
0
Initial
M L
State
0
O X
20-21