Samsung S3C6400X User Manual page 417

S3C6400X RISC MICROPROCESSOR
FRAME Buffer Address 0 Register
Register
VIDW00ADD0B0 0x771000A0
VIDW00ADD0B1 0x771000A4
VIDW01ADD0B0 0x771000A8
VIDW01ADD0B1 0x771000AC
VIDW02ADD0 0x771000B0
VIDW03ADD0 0x771000B8
VIDW04ADD0 0x771000C0
VIDWxxADD0 Bit
VBANK_F [31:24] These bits indicate A[31:24] of the bank location for the video buffer
VBASEU_F [23:0]
FRAME Buffer Address 1 Register
Register Address
VIDW00ADD1B0 0x771000D
0
VIDW00ADD1B1 0x771000D
4
VIDW01ADD1B0 0x771000D
8
VIDW01ADD1B1 0x771000D
C
VIDW02ADD1 0x771000E
0
VIDW03ADD1 0x771000E
8
VIDW04ADD1 0x771000F0 R/W Window 4's buffer end address register
VIDWxxADD1 Bit
VBASEL_F [23:0]
Address R/W
R/W Window 0's buffer start address register, buffer 0
R/W Window 0's buffer start address register, buffer 1
R/W Window 1's buffer start address register, buffer 0
R/W Window 1's buffer start address register, buffer 1
R/W Window 2's buffer start address register
R/W Window 3's buffer start address register
R/W Window 4's buffer start address register
in the system memory.
These bits indicate A[23:0] of the start address of the Video frame
buffer.
R/W
R/W Window 0's buffer end address register, buffer 0
R/W Window 0's buffer end address register, buffer 1
R/W Window 1's buffer end address register, buffer 0
R/W Window 1's buffer end address register, buffer 1
R/W Window 2's buffer end address register
R/W Window 3's buffer end address register
These bits indicate A[23:0] of the end address of the Video frame
buffer.
VBASEL = VBASEU +
(PAGEWIDTH+OFFSIZE) x (LINEVAL+1)
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
Description
DISPLAY CONTROLLER
Reset Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Initial State
0
0
Reset Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Initial State
0x0
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