SECURITY SUB-SYSTEM
DMA & INTERRUPT CONTROL MODULE
SECURITY SUB-SYSTEM DMA & INTERRUPT REGISTER
Register
Address
DnI_Cfg
0x7D00_0000
DnI_Cfg
WrPrivMismatch
RdPrivMismatch
Reserved
[29:23]
SHA_intr_Status
DES_intr_Status
AES_intr_Status
Reserved
[19:18]
FTx_intr_Status
FRx_intr_Status
Reserved
SHA_intr_En
DES_intr_En
AES_intr_En
Reserved
[11:10]
FTx_intr_En
FRx_intr_En
TxTrgLevel
TxDmaEnb
RxTrgLevel
RxDmaEnb
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
13-8
Specifications and information herein are subject to change without notice.
R/W
R/W DMA and interrupt configuration Control & Status Reg.
Bit
[31]
SFR Write Access Privilege Mismatch Status bit. If set to '1', SFR
Write Access Privilege Mismatch is occurred.
[30]
SFR Read Access Privilege Mismatch Status bit. If set to '1', SFR
Read Access Privilege Mismatch is occurred.
Reserved
[22]
SHA-1/PRNG interrupt status and peding bit. This is cleared when
read.
[21]
DES/3DES interrupt status and peding bit. This is cleared when read.
[20]
AES interrupt status and peding bit. This is cleared when read.
Reserved
[17]
FIFO-Tx interrupt status and peding bit. This is cleared when read.
[16]
FIFO-Rx interrupt status and peding bit. This is cleared when read.
[15]
Reserved
[14]
SHA-1/PRNG interrupt enabled when finished.
[13]
DES/3DES interrupt enabled when finished.
[12]
AES interrupt enabled when finished.
Reserved
[9]
FIFO-Tx interrupt enabled when finished.
[8]
FIFO-Rx interrupt enabled when finished.
[7:5]
Tx side DMA trigger level setting.
000 = 1-word
100 = 16-word 101 = 20-word 110 = 24-word 111 = 28-word
[4]
Tx side DMA enable bit (1: enable)
[3:1]
Rx side DMA trigger level setting.
000 = 1-word
100 = 16-word 101 = 20-word 110 = 24-word 111 = 28-word
[0]
Rx side DMA enable bit (1: enable)
Description
Description
001 = 4-word
010 = 8-word
001 = 4-word
010 = 8-word
S3C6400X RISC MICROPROCESSOR
Reset Value
0x0000_0000
011 = 12-word
011 = 12-word
Initial
State
0b
0b
0x00
0b
0b
0b
00b
0b
0b
0b
0b
0b
0b
00b
0b
0b
000b
0b
000b
0b