Samsung S3C6400X User Manual page 1017

UART
UART MODEM STATUS REGISTER
Register Address
UMSTAT0 0x7F00501C
UMSTAT1 0x7F00541C
Reserved 0x7F00581C
Reserved 0x7F005C1C
There are two UART modem status registers including UMSTAT0 and UMSTAT1 in the UART block.
UMSTAT0
Reserved
Delta CTS
Reserved
Clear to Send
nCTS
Delta CTS
Read_UMSTAT
31-22
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
R/W
R UART channel 0 Modem status register
R UART channel 1 Modem status register
- Reserved
- Reserved
Bit
[7:5] reserved
[4] Indicate that the nCTS input to the S3C6400 has changed
state since the last time it was read by CPU. (Figure 31-8)
0 = Has not changed
1 = Has changed
[3:1] reserved
[0] 0 = CTS signal is not activated (nCTS pin is high)
1 = CTS signal is activated (nCTS pin is low)
Figure 31-8 nCTS and Delta CTS Timing Diagram
S3C6400 RISC MICROPROCESSOR
Description
Description
Reset Value
0x0
0x0
Undef
Undef
Initial State
000
0
00
0