Samsung S3C6400X User Manual page 407

S3C6400X RISC MICROPROCESSOR
ALPHA_SEL [1]
ENWIN_F [0]
Window 3 Control Register
Register Address
WINCON3 0x7710002C
WINCON3 Bit
BITSWP [18]
BYTSWP [17]
HAWSWP [16]
reserved [15:11]
BURSTLEN [10:9]
- [8:7]
BLD_PIX [6]
1001 = unpacked 18 BPP ( non-palletized, A:1-R:6-G:6-B:5 )
1010 = unpacked 19 BPP ( non-palletized, A:1-R:6-G:6-B:6 )
1011 = unpacked 24 BPP ( non-palletized R:8-G:8-B:8 )
1100 = unpacked 24 BPP ( non-palletized A:1-R:8-G:8-B:7 )
1101 = unpacked 25 BPP ( non-palletized A:1-R:8-G:8-B:8 )
111x = reserved
Note. 1101 can support unpacked 28 BPP also ( non-palletized
A:4-R:8-G:8-B:8 ) ,at BLD_PIX = 1.
Select Alpha value by
When (BLD_PIX ==0)
0 = using ALPHA0_R/G/B values
1 = using ALPHA1_R/G/B values
When (BLD_PIX ==1)
0 = selected by AEN (A value) or chroma key
1 = using DATA [27:24] data (only when BPPMODE_F = 4'b1101)
Video output and the logic immediately enable/disable.
0 = Disable the video output and the VIDEO control signal.
1 = Enable the video output and the VIDEO control signal.
R/W
R/W Window control 3 register
Bit swap control bit.
0 = Swap Disable
Bytes swap control bit.
0 = Swap Disable
Half-Word swap control bit.
0 = Swap Disable
Must be '0'
DMA's Burst Maximum Length selection:
00 : 16 word– burst
01 : 8 word– burst
10 : 4 word– burst
Reserved
Select blending category
0 = Per plane blending
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
1 = Swap Enable
1 = Swap Enable
1 = Swap Enable
DISPLAY CONTROLLER
0
0
Reset Value
0x0000_0000
Initial State
0
0
0
0
0
0
0
14-45