Samsung S3C6400X User Manual page 1018

S3C6400 RISC MICROPROCESSOR
UART TRANSMIT BUFFER REGISTER (HOLDING REGISTER & FIFO REGISTER)
Register Address
UTXH0 0x7F005020
UTXH1 0x7F005420
UTXH2 0x7F005820
UTXH3 0x7F005C20
There are four UART transmitting buffer registers including UTXH0, UTXH1, UTXH2 and UTXH3 in the UART
block. UTXHn has an 8-bit data for transmitting data.
UTXHn
TXDATAn
UART RECIVE BUFFER REGISTER (HOLDING REGISTER & FIFO REGISTER)
There are four UART receiving buffer registers including URXH0, URXH1, URXH2 and URXH3 in the UART
block. URXHn has an 8-bit data for received data.
Register
URXH0 0x7F005024
URXH1 0x7F005424
URXH2 0x7F005824
URXH3 0x7F005C24
URXHn
RXDATAn
Note: When an overrun error occurs, the URXHn must be read. If not, the next received data will also make an
overrun error, even though the overrun bit of UERSTATn had been cleared.
R/W
W UART channel 0 transmit buffer register
W UART channel 1 transmit buffer register
W UART channel 2 transmit buffer register
W UART channel 3 transmit buffer register
Bit
[7:0] Transmit data for UARTn
Address R/W
R
R
R
R
Bit
[7:0] Receive data for UARTn
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
UART channel 0 receive buffer register
UART channel 1 receive buffer register
UART channel 2 receive buffer register
UART channel 3 receive buffer register
Description
UART
Reset Value
-
-
-
-
Initial State
-
Reset Value
0x00
0x00
0x00
0x00
Initial State
0x00
31-23