Samsung S3C6400X User Manual page 835

USB2.0 HS OTG
USBRst
USBSusp
ErlySusp
GOUTNakEff
GINNakEff
NPTxFEmp
RxFLvl
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
26-28
Specifications and information herein are subject to change without notice.
the Device Status (DSTS) register to obtain the
enumerated speed.
[12] R_SS_ USB Reset
WC The core sets this bit to indicate that a reset is
detected on the USB.
[11] R_SS_ USB Suspend
WC The core sets this bit to indicate that a suspend was
detected on the USB. The core enters the
Suspended state when there is no activity on the
line_state signal for an extended period of time.
[10] R_SS_ Early Suspend
WC The core sets this bit to indicate that an Idle state
has been detected on the USB for 3 ms.
[9] Reserved
[8] Reserved
[7] RO Global OUT NAK Effective
Indicates that the Set Global OUT NAK bit in the
Device Control register (DCTL.SGOUTNak), set by
the application, has taken effect in the core. This bit
can be cleared by writing the Clear Global OUT NAK
bit in the Device Control register.
[6] RO Global IN Non-Periodic NAK Effective
Indicates that the Set Global Non-Periodic IN NAK
bit in the Device Control register
(DCTL.SGNPInNak), set by the application, has
taken effect in the core. That is, the core has
sampled the Global IN NAK bit set by the
application. This bit can be cleared by clearing the
Clear Global Non-Periodic IN NAK bit set by the
application. This bit can be cleared by clearing the
Clear Global Non-Periodic IN NAK bit in the Device
Control register (DCTL.CGNPInNak). This interrupt
does not necessarily mean that a NAK handshake is
sent out on the USB. The STALL bit takes
precedence over the NAK bit.
[5] RO Non-Periodic TxFIFO Empty
This interrupt is asserted when the Non-Periodic
TxFIFO is either half or completely empty, and there
is space for at least one entry to be written to the
Non-Periodic Transmit Request Queue. The half or
completely empty status is determined by the Non-
Periodic TxFIFO Empty Level bit in the Core AHB
Configuration register (GAHBCFG.NPTxFEmpLvl).
[4] RO RxFIFO Non-Empty
Indicates that there is at least one packet pending to
be read from the RxFIFO.
S3C6400X RISC MICROPROCESSOR
1'b0
1'b0
1'b0
1'b0
1'b0
1'b0
1'b0
1'b0
1'b0