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S3C6400X RISC MICROPROCESSOR
CAPTURE CONTROL SEQUENCE REGISTER
Register
Address
CICPTSEQ
0x780000C4
CICPTSEQ
Cpt_FrSeq
[31:0]
Capture
※ For skipped frmes, IRQ_CI is not generated. And FrameCnt is not increased.
IMAGE EFFECTS REGISTER
Register
Address
CIIMGEFF
0x780000D0
CIIMGEFF
IE_ON_Pr
IE_ON_Co
IE_AFTER_SC
FIN
[28:26]
R/W
RW
Bit
Capture sequence pattern
31
30
29
1
1
0
No
Capture
Capture
Figure 20-23. Capture frame control
R/W
RW
Bit
[31]
0 : image effect function disable in preview path , 1 : enable
[30]
0 : image effect function disable in codec path
Image Effect location
1: After scaling (camera and MSDMA image are applied except
[29]
scaler bypass mode)
0: Before scaling (only camera image must be applied)
Image Effect selection. (Common preview & codec path)
3'd0 : Bypass
3'd1 : Arbitrary Cb/Cr
3'd2 : Negative
3'd3 : Art Freeze
3'd4 : Embossing
3'd5 : Silhouette
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Camera image capture sequence related
Description
Cpt _ Fr Seq [ 31 :0 ]
. . . . .
Repeat
Description
Image Effects related
Description
CAMERA INTERFACE
Reset Value
Initial State
FFFF_FFFF
Cpt_ Fr Ptr
1
0
1
0
1
Capture
Reset Value
, 1 : enable
FFFF_FFFF
M L
X X
0010_0080
Initial
M L
State
0
O O
0
O O
0
O O
0
O O
20-45
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