Samsung S3C6400X User Manual page 164

S3C6400X RISC MICROPROCESSOR
PIN CONFIGURATION TABLE
OM[4:0]
0000x
0001x
0010x
0011x
Above configuration is applicable when NAND Flash is used as booting memory. If NAND Flash is not used as
boot memory, the configuration can be changed by setting NFCON SFR 'NFCONF' (0x70200000).
AdvFlash
0: Normal NAND
0: Normal NAND
1: Advance NAND
1: Advance NAND
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
PageSize AddrCycle
1: 512-byte
1: 512-byte
1: 2-Kbyte
1: 2-Kbyte
NAND FLASH CONTROLLER
BusWidth
0: 3 cycle 0: 8-bit data bus
1: 4 cycle 0: 8-bit data bus
0: 4 cycle 0: 8-bit data bus
1: 5 cycle 0: 8-bit data bus
8-3