Samsung S3C6400X User Manual page 129

S3C6400X RISC MICROPROCESSOR
SROM BANK CONTROL REGISTER (SROM_BC : XrCSn0 ~ XrCSn2)
Register Address
SROM_BC0
0x70000004
SROM_BC1
0x70000008
SROM_BC2
0x7000000C
SROM_BC3
0x70000010
SROM_BC4
0x70000014
SROM_BC5
0x70000018
SROM_BCn
Tacs
Tcos
Reserved
Tacc
Tcoh
Tcah
Tacp
R/W
SROM Bank0 control register
R/W
SROM Bank1 control register
R/W
SROM Bank2 control register
R/W
SROM Bank3 control register
R/W
SROM Bank4 control register
R/W
SROM Bank5 control register
R/W
Bit
[31:28] Adress set-up before nGCS
0000 = 0 clock
0010 = 2 clocks
1100 = 12 clocks
1110 = 14 clocks
[27:24] Chip selection set-up before nOE
0000 = 0 clock
0010 = 2 clocks
1100 = 12 clocks
1110 = 14 clocks
[23:21] Reserved
[20:16] Access cycle
00000 = 1 clock
00010 = 3 clocks
11100 = 29 clocks
11110 = 31 clocks
[15:12] Chip selection hold on nOE
0000 = 0 clock
0010 = 2 clocks
1100 = 12 clocks
1110 = 14 clocks
[11:8] Address holding time after nGCSn
0000 = 0 clock
0010 = 2 clocks
1100 = 12 clocks
1110 = 14 clocks
[7:4] Page mode access cycle @ Page mode
0000 = 0 clock
0010 = 2 clocks
1100 = 12 clocks
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
0001 = 1 clocks
0011 = 3 clocks
.............
1101 = 13 clocks
1111 = 15 clocks
0001 = 1 clocks
0011 = 3 clocks
.............
1101 = 13 clocks
1111 = 15 clocks
00001 = 2 clocks
00011 = 4 clocks
.............
11101 = 30 clocks
11111 = 32 clocks
0001 = 1 clocks
0011 = 3 clocks
.............
1101 = 13 clocks
1111 = 15 clocks
0001 = 1 clocks
0011 = 3 clocks
.............
1101 = 13 clocks
1111 = 15 clocks
0001 = 1 clocks
0011 = 3 clocks
.............
1101 = 13 clocks
SROM CONTROLLER
Reset Value
0x000F_0000
0x000F_0000
0x000F_0000
0x000F_0000
0x000F_0000
0x000F_0000
Initial State
0000
0000
000
01111
0000
0000
0000
6-7