Uarti Transmit/Receive Control Register 1 - Renesas 7700 FAMILY User Manual

SERIAL I/O
7.2 Block description
7.2.2 UARTi transmit/receive control register 0
Figure 7.2.3 shows the structure of UARTi transmit/receive control register 0. For bits 0 and 1, refer to
"7.2.1 (1) Internal/External clock select bit." For bit 7, refer to "7.2.2 transfer data format."
b7 b6 b5 b4 b3 b2
Fig. 7.2.3 Structure of UARTi transmit/receive control register 0
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(1) CTS/RTS select bit (bit 2)
By clearing this bit to "0" in order to select the CTS function, pins P8
pins, and the input signal of "L" level to these pins becomes one of the transmission conditions.
By setting this bit to "1" in order to select the RTS function, pins P8
pins. When the receive enable bit (bit 2 at addresses 35
output pin outputs "H" level.
The output level of this pin becomes "L" when the receive enable bit is set to "1." It becomes "H"
when reception starts and it becomes "L" when reception is completed.
(2) Transmit register empty flag (bit 3)
This flag is cleared to "0" when the UARTi transmit buffer register's contents are transferred to the
UARTi transmit register. When transmission is completed and the UARTi transmit register becomes
empty, this flag is set to "1."
7–6
b1 b0
UART0 transmit/receive control register 0 (Address 34
UART1 transmit/receive control register 0 (Address 3C
Bit
0
BRG count source select bits
1
2 CTS/RTS select bit
Transmit register empty flag
3
6 to 4 Nothing is assigned.
Transfer format select bit
7
(Used in clock synchronous
serial I/O mode)
Note: Fix bit 7 to "0" in the UART mode or when Serial I/O is ignored.
7751 Group User's Manual
Bit name
b1 b0
0 0 : f
2
0 1 : f
16
1 0 : f
64
1 1 : f
512
0 : CTS function selected.
1 : RTS function selected.
0 : Data present in transmit register.
(During transmitting)
1 : No data present in transmit register.
(Transmitting completed)
0 : LSB (Least Significant Bit) first
1 : MSB (Most Significant Bit) first
(Note)
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, 3D
16
)
16
)
16
Functions
/ f
4
/ f
32
/ f
128
/ f
1024
and P8 function as CTS input
0 4
and P8 become RTS output
0 4
) is "0" (reception disabled), the RTS
16
RW
At reset
0
RW
RW
0
0 RW
1 RO
–
Undefined
RW
0
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