Fig. 6.6.2 Sfr Assignment; Fig. 6.6.4 Sfr Assignment; Fig. 6.7.5 Pwm Output Control Register 1; Fig. 6.7.6 Pwm Output Control Register 2 - Renesas 7200 Series User Manual

APPENDIX
6.6 SFR assignment
Address
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
CA
CB
CC
CD
CE
CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
Fig. 6.6.4 SFR assignment (including internal state immediately after reset and access characteristics) (4)
(M37220M3-XXXSP/FP)
6-26
SFR Area (addresses C0
Register
Port P0 (P0)
16
Port P0 direction register (D0)
16
Port P1 (P1)
16
Port P1 direction register (D1)
16
Port P2 (P2)
16
Port P2 direction register (D2)
16
Port P3 (P3)
16
Port P3 direction register (D3)
16
16
16
Port P5 (P5)
16
Port P5 direction register (D5)
16
16
Port P3 output mode control register (P3S)
16
DA-H register (DA-H)
16
DA-L register (DA-L)
16
PWM0 register (PWM0)
16
PWM1 register (PWM1)
16
PWM2 register (PWM2)
16
PWM3 register (PWM3)
16
PWM4 register (PWM4)
16
PWM output control register 1 (PW)
16
PWM output control register 2 (PN)
16
16
16
16
16
16
Serial I/O mode register (SM)
16
Serial I/O regsiter (SIO)
16
DA1 conversion register (DA1)
16
DA2 conversion register (DA2)
16
7220 Group User's Manual
to DF )
16 16
Bit allocation
< >
:
Function bit
:
Name
:
No function bit
: Fix this bit to "0"
0
(do not write "1")
: Fix this bit to "1"
1
(do not write "0")
Bit allocation
b7
DA2S
PW7 PW6 PW5 PW4
PN4
0
SM6 SM5
0
DA15 DA14
0
DA25 DA24
b0
DA1S P31S P30S
PW3 PW2 PW1 PW0
PN3 PN2
SM3 SM2 SM1
SM0
DA13 DA12 DA11
DA10
DA23 DA22 DA21 DA20