Interrupt Exception Handling Sequence - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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5.4.4

Interrupt Exception Handling Sequence

Figure 5-7 shows the interrupt exception handling sequence. The example shown is for the case where interrupt control
mode 0 is set in advanced mode, and the program area and stack area are in on-chip memory.
Figure 5-7 Interrupt Exception Handling
Rev.6.00 Oct.28.2004 page 97 of 1016
REJ09B0138-0600H

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