Write Data Buffer Function - Renesas H8S Series Hardware Manual

6.9

Write Data Buffer Function

The H8S/2357 Group has a write data buffer function in the external data bus. Using the write data buffer function enables
external writes and DMA single address mode transfers to be executed in parallel with internal accesses. The write data
buffer function is made available by setting the WDBE bit in BCRL to 1.
Figure 6-36 shows an example of the timing when the write data buffer function is used. When this function is used, if an
external write or DMA single address mode transfer continues for 2 states or longer, and there is an internal access next,
only an external write is executed in the first state, but from the next state onward an internal access (on-chip memory or
internal I/O register read/write) is executed in parallel with the external write rather than waiting until it ends.
Internal address bus
Internal read signal
External
space
write
Note : n = 0 to 7
Figure 6-36 Example of Timing when Write Data Buffer Function is Used
Rev.6.00 Oct.28.2004 page 158 of 1016
REJ09B0138-0600H
T
1
A to A
23 0
CSn
HWR, LWR
D to D
15 0
On-chip memory read Internal I/O register read
External write cycle
T T
2 W
Internal memory Internal I/O register address
External address
T T
W 3