Renesas H8S Series Hardware Manual page 934

PORTG—Port G Register
Bit
Initial value
Read/Write
Note: * Determined by the state of pins PG
P1DR—Port 1 Data Register
Bit
Initial value
Read/Write
P2DR—Port 2 Data Register
Bit
Initial value
Read/Write
P3DR—Port 3 Data Register
Bit
Initial value
Read/Write
Rev.6.00 Oct.28.2004 page 906 of 1016
REJ09B0138-0600H
:
7 6
— —
:
Undefined Undefined Undefined
:
— —
: 7 6
P17DR P16DR
: 0 0
:
R/W R/W
Stores output data for port 1 pins (P1
:
7 6
P27DR P26DR
:
0 0
:
R/W R/W
Stores output data for port 2 pins (P2
:
7 6
— —
:
Undefined Undefined
:
— —
Stores output data for port 3 pins (P3
H'FF5F
5 4 3
— PG4 PG3
—* —*
— R R
to PG .
4 0
H'FF60
5 4 3
P15DR P14DR P13DR
0 0 0
R/W R/W R/W
H'FF61
5 4 3
P25DR P24DR P23DR
0 0 0
R/W R/W R/W
H'FF62
5 4 3
P35DR P34DR P33DR
0 0 0
R/W R/W R/W
Port G
2 1
PG2 PG1
—* —*
R R
State of port G pins
Port 1
2 1
P12DR P11DR
0 0
R/W R/W
to P1 )
7 0
Port 2
2 1
P22DR P21DR
0 0
R/W R/W
to P2 )
7 0
Port 3
2 1
P32DR P31DR
0 0
R/W R/W
to P3 )
5 0
0
PG0
—*
R
0
P10DR
0
R/W
0
P20DR
0
R/W
0
P30DR
0
R/W