Renesas H8S Series Hardware Manual page 362

Port G Register (PORTG)
Bit : 7
—
Initial value :
Undefined Undefined Undefined
R/W : —
Note: * Determined by state of pins PG
PORTG is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port
G pins (PG to PG ) must always be performed on PGDR.
4 0
Bits 7 to 5 are reserved; they return an undetermined value if read, and cannot be modified.
If a port G read is performed while PGDDR bits are set to 1, the PGDR values are read. If a port G read is performed
while PGDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTG contents are determined by the pin states, as PGDDR and
PGDR are initialized. PORTG retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Rev.6.00 Oct.28.2004 page 334 of 1016
REJ09B0138-0600H
6 5 4
— — PG4
—*
— — R
to PG .
4 0
3 2 1
PG3 PG2 PG1
—* —* —*
R R R
0
PG0
—*
R