Renesas H8S Series Hardware Manual page 523

• Serial data reception (asynchronous mode)
Figure 14-7 shows a sample flowchart for serial reception.
The following procedure should be used for serial data reception.
No
No
Initialization
Start reception
Read ORER, PER, and
FER flags in SSR
PER∨FER∨ORER= 1
No
(Continued on next page)
Read RDRF flag in SSR
RDRF= 1
Yes
Read receive data in RDR, and
clear RDRF flag in SSR to 0
All data received?
Yes
Clear RE bit in SCR to 0
<End>
Figure 14-7 Sample Serial Reception Data Flowchart
[1]
SCI initialization:
[1]
The RxD pin is automatically
designated as the receive data
input pin.
[2] [3] Receive error processing and
break detection:
If a receive error occurs, read the
[2]
ORER, PER, and FER flags in
SSR to identify the error. After
performing the appropriate error
Yes
processing, ensure that the
ORER, PER, and FER flags are
[3]
all cleared to 0. Reception cannot
Error processing
be resumed if any of these flags
are set to 1. In the case of a
framing error, a break can be
detected by reading the value of
[4]
the input port corresponding to
the RxD pin.
[4]
SCI status check and receive
data read :
Read SSR and check that RDRF
= 1, then read the receive data in
RDR and clear the RDRF flag to
0. Transition of the RDRF flag
from 0 to 1 can also be identified
by an RXI interrupt.
[5] Serial reception continuation
[5]
procedure:
To continue serial reception,
before the stop bit for the current
frame is received, read the
RDRF flag, read RDR, and clear
the RDRF flag to 0. The RDRF
flag is cleared automatically
when the DMAC or DTC is
activated by an RXI interrupt and
the RDR value is read.
Rev.6.00 Oct.28.2004 page 495 of 1016
REJ09B0138-0600H