Instructions And Addressing Modes - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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2.6.2

Instructions and Addressing Modes

Table 2-2 indicates the combinations of instructions and addressing modes that the H8S/2600 CPU can use.
Table 2-2
Combinations of Instructions and Addressing Modes
Function
Instruction
Data
MOV
transfer
POP, PUSH
LDM, STM
MOVFPE,
1
MOVTPE*
Arithmetic
ADD, CMP
operations
SUB
ADDX, SUBX
ADDS, SUBS
INC, DEC
DAA, DAS
MULXU,
DIVXU
MULXS,
DIVXS
NEG
EXTU, EXTS
2
TAS*
Logic
AND, OR,
operations
XOR
NOT
Shift
Bit manipulation
Bcc, BSR
Branch
JMP, JSR
RTS
TRAPA
System
control
RTE
SLEEP
LDC
STC
ANDC,
ORC, XORC
NOP
Block data transfer
Legend:
B: Byte
W: Word
L: Longword
Notes: 1. Cannot be used in the H8S/2357 Group.
2. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
Rev.6.00 Oct.28.2004 page 34 of 1016
REJ09B0138-0600H
BWL
BWL
BWL
BWL
BWL
BWL
WL
BWL
B
B
L
BWL
B
BW
BW
BWL
WL
B
BWL
BWL
BWL
BWL
B
B
B
B
W
W
B
W
W
B
Addressing Modes
BWL
BWL
B
BWL
B
B
B
W
W
W
W
W
W
BWL
B
W
W
WL
L
BW

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