Renesas H8S Series Hardware Manual page 390

16-bit single-chip microcomputer
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Bit 4—Overflow Interrupt Enable (TCIEV): Enables or disables interrupt requests (TCIV) by the TCFV flag when the
TCFV flag in TSR is set to 1.
Bit 4
TCIEV
0
1
Bit 3—TGR Interrupt Enable D (TGIED): Enables or disables interrupt requests (TGID) by the TGFD bit when the
TGFD bit in TSR is set to 1 in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 3 is reserved. It is always read as 0 and cannot be modified.
Bit 3
TGIED
0
1
Bit 2—TGR Interrupt Enable C (TGIEC): Enables or disables interrupt requests (TGIC) by the TGFC bit when the
TGFC bit in TSR is set to 1 in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 2 is reserved. It is always read as 0 and cannot be modified.
Bit 2
TGIEC
0
1
Bit 1—TGR Interrupt Enable B (TGIEB): Enables or disables interrupt requests (TGIB) by the TGFB bit when the
TGFB bit in TSR is set to 1.
Bit 1
TGIEB
0
1
Bit 0—TGR Interrupt Enable A (TGIEA): Enables or disables interrupt requests (TGIA) by the TGFA bit when the
TGFA bit in TSR is set to 1.
Bit 0
TGIEA
0
1
Rev.6.00 Oct.28.2004 page 362 of 1016
REJ09B0138-0600H
Description
Interrupt requests (TCIV) by TCFV disabled
Interrupt requests (TCIV) by TCFV enabled
Description
Interrupt requests (TGID) by TGFD bit disabled
Interrupt requests (TGID) by TGFD bit enabled
Description
Interrupt requests (TGIC) by TGFC bit disabled
Interrupt requests (TGIC) by TGFC bit enabled
Description
Interrupt requests (TGIB) by TGFB bit disabled
Interrupt requests (TGIB) by TGFB bit enabled
Description
Interrupt requests (TGIA) by TGFA bit disabled
Interrupt requests (TGIA) by TGFA bit enabled
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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